- Created on Sunday, 08 June 2014 14:32
- Last Updated on Friday, 18 July 2014 12:39
Today should have been a day of great delight as my personal supercomputer, or Parallella the Epiphany III processor with Xilinx Zynq 7020 FPGA, finally appeared in my hands after many months of delay. However, I wasn't exactly jumping up and down with joy for, as like most "supercomputing for everyone" enthusiasts, I was suffering from "where is my Parallella" fatigue.
Parallella first appeared as a Kickstarter project, in October 2012, where it did wonderfully well in raising $898,921 in its allocated fund raising slot. However, at the time I didn't back the project, as the $3 million stretch goal required for the production run of the 64-core version, the Epiphany IV processor, was not met.
You can read about my observations using the Parallela kit in the Blog Category: The Parallella Post. Also, you can read about my projects using the Parallella kit in the Project Series - The Parallella Chronicles (link coming soon).
- Created on Saturday, 14 June 2014 12:53
- Last Updated on Sunday, 13 July 2014 06:51
To alleviate the poverty of flexibility in our existing design, described in previous parts of the tutorial, a revision to the design has had to be considered. This has resulted in the development of a transmission arbitration module. Thus, the overall objectives of part six, of tutorial series 1, is to firstly design and implement a round-robin transmission slot arbitration module that can be used in conjunction with the UART module developed previously. Then, secondly, a real-world example should be demonstrated on the DE0-Nano Development Kit platform.